1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device, and more particularly, to techniques which are effectively applied to a technique for filling an insulating underfill resin in an interstice between a wiring board and a semiconductor chips which is flip chip connected to the wiring board.
2. Description of the Related Art
As one semiconductor device, a so-called flip chip connection structure is known, where a semiconductor chip is mounted on wires routed on one surface of a wiring board through salient electrodes placed thereon. External electrode terminals are disposed on the other surface of the wiring board. As one flip chip connection structure, JP-A-2000-77471 discloses an example in which gold bump electrodes (gold stud electrodes) disposed on one surface of a semiconductor chip are flip chip mounted to bar-shaped wires (conductor pattern) routed on the top surface of a wiring board through solder.
Patent Document 1 describes a structure which has a connection conductor pattern arranged on a flip chip mounting board, which is made up of a wiring pattern which serves as wires, and connection pads formed continuously to the wiring pattern at positions at which bumps are bonded and having a width wider than the width of the wiring pattern. In this way, when a connection medium (solder) applied on the connection conductor pattern is melted, the solder converges on the connection pads into a lump shape, at the same time the wiring pattern is being formed with a thin film of the connection medium. The bumps are connected to the aforementioned lump-shaped portions.
On the other hand, JP-A-2005-327947 discloses a method for flip chip connecting a semiconductor chip to a wiring board, which involves previously coating an underfill resin on portions of the wiring board, opening up the underfill resin with the semiconductor chip when it is flip chip connected, and filling the interstice between the wiring board and semiconductor chip with the underfill resin.
In semiconductor devices such as CSP (Chip Size Package), BGA (Ball GRid Array) and the like, a structure for flip chip connecting a semiconductor chip on a wiring board is often used in order to reduce the size and thickness of the semiconductor devices. Also, in order to improve the resistance of semiconductor devices to humidity, a structure is employed for filling an interstice between a wiring board and a semiconductor chip with an insulating resin (underfill resin).
A conventional BGA-type semiconductor device has a structure as illustrated in FIG. 1. FIG. 1 illustrates a schematic diagram of the general structure of a BGA-type semiconductor device. Semiconductor device 70 comprises wiring board 71 made, for example, of a glass epoxy resin board, and semiconductor chip 72 electrically connected to the top surface of wiring board 71 through a flip chip connection. Salient electrodes 73 of semiconductor chip 72 are electrically connected to wires (connection pads), not shown. An interstice between semiconductor chip 72 and wiring board 71 is filled with underfill resin 74. Semiconductor chip 72, underfill resin 74 and the like are covered with sealant 75 formed over wiring board 71 and made of an insulating resin. A plurality of external electrode terminals 76 are disposed on the bottom surface of a wiring board.
FIG. 2 illustrates an enlarged cross-sectional view of an end portion of semiconductor device 70 in greater detail. Wiring board 71 has wires 78, 79, respectively, on the top surface and bottom surface of core board 77 made of an insulating glass epoxy resin board. These wires 78, 79 are electrically connected at required locations through conductors 80 extended through board core 77. Also, insulating solder resist films 81, 82 are selectively disposed on the top and bottom surfaces of board core 77. Solder resist films 81, 82 fill up even throughholes in which conductors 80 are formed.
Solder layer 84 is formed on a portion of wire 78 exposed from solder resist film 81 on the top surface of board core 77, and salient electrode 73 of semiconductor chip 72 is fixed on solder layer 84 with solder 86. Salient electrode 73 is formed on the surface of electrode 85 of semiconductor chip 72. In a broader sense, an electrode, when so called, includes salient electrode 73 and electrode 85 as well. As illustrated in FIG. 3, wires 78 are structured to be partially exposed in openings 91 formed by opening solder resist film 81 which was formed on the top surface of board core 77, in an elongated shape. Openings 91 are formed along respective side of square wiring board 71 which includes elongated grooves. Also, a plurality of wires 78 disposed on the bottom of respective openings 91 extend in parallel along a width direction of rectangular openings 91. FIG. 3 omits the illustration of solder layer 84 on the surface of wire 78. A central portion of elongated wire 78 serves as connection pad 83. For convenience, circles are shown in openings 91 formed along the top side of the square illustrated in FIG. 3. These circular areas are those portions at which salient electrodes 73 of semiconductor chip 72 are connected to connection pads 83. To facilitate the understanding, the circles are labeled with the reference numeral of salient electrode 73 for convenience.
Also, as illustrated in FIG. 2, solder layer 88 is formed on top of a portion (connection 87) of wire 79 exposed from solder resist film 82 on the bottom surface of board core 77, and solder ball electrode 89 is fixed on solder ball electrode 89. External electrode terminal 76 is formed by this solder ball electrode 89. In this connection, external electrode terminal 86 is simply called the electrode as well.
Prior to the flip chip connection, an underfill resin (not shown) is selectively coated inside of a frame-shaped portion formed by four openings 91 shown in FIG. 3. Subsequently, as illustrated in FIG. 4A, semiconductor chip 72 is moved down, and semiconductor chip 72 is pressed onto wiring board 71 (see a bold arrow). As a result, underfill resin 74 on wiring board 71 is squeezed by the top surface of semiconductor chip 72 to spread over the top surface of wiring board 71, and flows into openings 91 from solder resist film 81, as indicated by a thin arrow. Also, since underfill resin 74 spreads further, underfill resin 74 spreads from opening 91 onto solder resist film 81, as illustrated in FIG. 4B.
In such flip chip connection, air bubble (void) can sometimes occur in underfill resin 74 filled between wiring board 71 and semiconductor chip 72, as illustrated in FIG. 1.
As a result of analyzing and considering the spreading of underfill resin 74, the inventors found the following fact. Specifically, underfill resin 74 spreads at different speeds (moving speeds) on the surface of board core 77 that is made of a glass epoxy resin and on the surface of solder layer 84 which is a metal, where the speed is higher than on a surface made of glass epoxy resin. Accordingly, a head portion of the underfill resin flows faster on the metal surface area, as compared with the area of board core 77, causing disturbance in the head portion. This disturbance in the moving speed of the underfill resin causes air to be caught up in the head portion, making air bubble (void) 90 more likely to occur.
FIG. 5 illustrates a portion of openings 91. This figure shows the flowing (spreading) state of underfill resin 74. Openings 91 are arranged in a rectangular frame shape, and underfill resin 74 is coated inside of the rectangular frame, with the result that when underfill resin 74 is pressed down by semiconductor chip 72, underfill resin 74 flows into openings 91 from inside edges 91a of openings 91, and again spreads over solder resist film 81 from outer edges 91b. Since solder layer 84 is made of a metal, its surface is flat and encourages underfill resin 74 to flow thereon. On the other hand, since the surface of board core 77 made of a glass epoxy resin is coarse, as compared with the metal surface, underfill resin 74 moves at a speed lower than that on solder layer 84. Accordingly, as illustrated in FIG. 5, the head portion of flowing underfill resin 74 forms advanced head 92 on solder layer 84, and forms delayed head 93 on board core 77, causing the overall head to be undulated. Then, as larger difference a exists between advanced head 92 and delayed head 93, air is more likely to be caught up. Specifically, as the flow is disturbed, the head portion extends to left and right. As advanced head 92 collides with salient electrode 73 stacked on wire 78, advanced head 92 branches into two parts which flow beside salient electrode 73. In this event, the laterally extending head portion delays and extends in front of delayed head 93, and integrates with the extending portion of advanced head 92 which moves forward alongside, thereby catching up air in the flow of underfill resin 74. As a result, air bubble (void) 90 remains in underfill resin 74 after a curing process.